Se describen las composiciones farmaceuticas que contienen, como ingredientes activos, una mezcla de un polimero de acýdo hialuronico con un antagonista del receptor de bradiquia B2.; Disclosed are pharmaceutical compositions containing, as the active ingredients, a mixture of a hyaluronic acid polymer with a bradykinin B2 receptor antagonist. Said compositions have proved especially effective in ...

Economical methods for forming a co-planar multi-chip wafer-level packages are proposed. Partial wafer bonding and partial wafer dicing techniques are used to create chips as well as pockets. The finished chips are then mounted in the corresponding pockets of a carrier substrate, and global interconnects among the chips are formed on the top planar surface of the finished chips. The proposed metho...

A method and an apparatus are presented for providing federated functionality within a data processing system. An incoming first request is received at point-of-contact functionality. In response to a determination that information derived from the received request requires processing by federated user lifecycle management functionality, the derived information is sent from the point-of-contact fu...

A microsystem, comprising a first static element (1), a second, movable and unattached element (2), an actuator (3) for effecting a force between the first and the second element (1, 2), which actuator (3) is designed for controlling a temperature (T1, T2) of one of the first element (1) and the second element (2). A corresponding method for positioning a second element (2) with respect to a first...

An antifuse device ( 120 ) that includes a bias element ( 124 ) and an programmable antifuse element ( 128 ) arranged in series with one another so as to form a voltage divider having an output node (F) located between the bias and antifuse elements. When the antifuse device is in its unprogrammed state, each of the bias element and antifuse element is non-conductive. When the antifuse device is i...

One aspect of the invention is a method for storing data in an array of storage devices. An example of the method includes writing a first strip to a first storage device and a second storage device. This example also includes writing a second strip to the second storage device and a third storage device. This example further includes writing a third strip to a third storage device and a fourth st...

An apparatus includes a multi-cycle clock gater and a circuit design updater. The multi-cycle clock gater generates multi-cycle gating groups of data latching devices of a circuit design. The circuit design updater updates the circuit design with selected multi-cycle gating groups. Each gating group is associated with a single gating function. For each gating group, data latching devices of 0th le...

A MEM switch is described having a free moving element within in micro-cavity, and guided by at least one inductive element. The switch consists of an upper inductive coil; an optional lower inductive coil, each having a metallic core preferably made of permalloy; a micro-cavity; and a free-moving switching element preferably also made of magnetic material. Switching is achieved by passing a curre...

A client computer system, method and software tool for displaying portlet content are provided. The system comprises a user interface, a portlet server and a portlet view tool. The user interface allows the display of a page including one or more view window(s), each displaying content provided by a component of the computer system. The portlet server processes requests for portlet content, and ha...

A self-contained backup power source such as a battery is provided for components within an electrically powered device such as a storage controller, photocopier or the like, to maintain diagnostic status data and to power a service indicator aid, or diagnostic indicator, such as an LED. A switch selects the backup power source when a primary power source of the electrically powered device is no l...

A CMOS image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each ...

A design verification method, comprising providing a circuit design; creating a stimulus tree diagram for the circuit design, wherein the stimulus tree diagram comprises L stimuli, M checkpointed splits, and N non-checkpointed splits; and executing the stimulus tree diagram, wherein said executing the stimulus tree diagram comprises, for i=1, . . . , M, executing an i^th checkpointed spl...

Managing computer memory in a computer with dynamic logical partitioning that operates transparently with respect to operating systems in logical partitions. Exemplary methods, systems, and products are described for managing computer memory in a computer with dynamic logical partitioning that include copying by a hypervisor, from page frames in one logical memory block ("LMB") of a logical partit...

A computer implemented method, apparatus, and computer usable program code to receive data from a source at a plurality of gateways for distribution using a selected priority. The data is transmitted from the plurality of gateways to a plurality of receivers using the selected priority. Every gateway in the plurality of gateways has an adaptive bandwidth control process and a respective set of par...

The present invention relates to a semiconductor device that comprises at least one field effect transistor (FET) containing a source region, a drain region, a channel region, a gate dielectric layer, a gate electrode, and one or more gate sidewall spacers. The gate electrode of such an FET contains an intrinsically stressed gate metal silicide layer, which is laterally confined by one or more gat...

In a first aspect, a first method of manufacturing a finFET is provided. The first method includes the steps of (1) providing a substrate; and (2) forming at least one source/drain diffusion region of the finFET on the substrate. Each source/drain diffusion region includes (a) an interior region of unsilicided silicon; and (b) silicide formed on a top surface and sidewalls of the region of unsilic...

A video encoder and corresponding method are provided for mixed inter/intra encoding of a macroblock having a plurality of partitions, where the encoder includes a reference picture weighting applicator coupled with a reference picture weighting factor unit for assigning weighting factors corresponding to each of the inter and intra coded partitions, respectively; and the corresponding method for ...

Methods and systems for zero copy in a virtualized network environment are disclosed. Aspects of one method may include a plurality of GOSs that share a single NIC. The NIC may switch communication to a GOS to allow that GOS access to a network via the NIC. The NIC may offload, for example, OSI layer 3, 4 , and/or 5 protocol operations from a host system and/or the GOSs. The data received from, or...

A wireless digital communication method for communicating between a base station (12) and a plurality of user equipment mobile terminals (UEs 30) and employs adaptive modulation and coding to achieve improved radio resource utilization and provide optimum data rates for user services. Blocks of downlink (DL) data are received by the base station which requests downlink DL channel quality measureme...

Water-soluble iron-carbohydrate complex (A) prepared from maltodextrin (MD) oxidation product. Water-soluble iron-carbohydrate complex (A) prepared from an aqueous solution of an iron(III) salt and an aqueous solution of the oxidation product obtained by treating at least one maltodextrin (MD) with aqueous hypochlorite solution at alkaline pH. If only one MD is used, it has dextrose equivalent (DE...