A semiconductor structure for preventing coupling noise in integrated circuits and a method of forming the same are provided. The semiconductor structure includes a signal-grounded seal ring. The seal ring includes a plurality of metal lines, each in a respective metal layer and surrounding a circuit region of the semiconductor chip, a plurality of vias connecting respective metal lines, and a plu...

A first plating foundation layer is formed by printing on a front face of a sheet-shaped insulating substrate. By inserting a punch into the sheet-shaped insulating substrate having the first plating foundation layer, a through hole is formed while leaving a piece having the plating foundation layer in the portion where the punch is inserted. A second plating foundation layer is formed by printing...

A method of dividing a circuit pattern for creating complementary stencil masks corresponding to complementary patterns, the method comprising a step of dividing a circuit pattern into a plurality of complementary patterns including a first complementary pattern comprising a pattern of a cantilevered beam member having a support portion width W1 and a length L1, and a second complementary pattern ...

A coating and developing system is constructed so as to enable the maintenance of an exposure system combined therewith at desired time. The coating and developing system carries a substrate delivered to a carrier handling block to a processing block to form a film on the substrate by a coating block included in the processing block, carries the substrate through an interface block to the exposure...

Irradiation with laser light is conducted, whereby an external region of a semiconductor thin film located on the outer side relative to a pattern of a light absorbing layer is thermally melted, and the light absorbing layer is heated, without melting an internal region of the semiconductor thin film located on the inner side relative to the pattern. Next, the molten semiconductor thin film is coo...

A method for manufacturing a semiconductor device includes expanding an active region and a recess region by an epitaxial growth process. As a result, a margin is sufficiently secured in processes for forming a device isolation film that defines the active region and for expanding a recess region to form a bulb recess region.

A chucking means is positioned relatively with respect to a pair of cutting means in such a state that each of a pair of imaging means images at least part of the particular rectangular regions which are separated apart in the Y-axis direction on the surface of a workpiece. Positions of the particular parts in the particular rectangular regions on the X-axis and Y-axis are detected by processing t...

There is provided a preventive maintenance technique capable of diagnosing apparatus conditions without causing serious decrease in uptime ratio. A plasma process apparatus is composed of a plasma processing main frame, and an apparatus controller controlling the plasma processing main frame. The plasma processing main frame has a vacuum process chamber, an exhaust device evacuating the vacuum pro...

A composition for forming a high-quality tantalum film which is advantageously used as an capacitor insulating film and a process for forming the high-quality tantalum film. The composition for forming a tantalum oxide film, which comprises at least one tantalum compound selected from the group consisting of a reaction product of a compound capable of reacting with a tantalum alkoxide and a tantal...

A semiconductor device may include a semiconductor substrate having a first region and a second region. The nitrogen-incorporated active region may be formed within the first region. A first gate electrode may be formed on the nitrogen-incorporated active region. A first gate dielectric layer may be interposed between the nitrogen-incorporated active region and the first gate electrode. The first ...

Methods for forming solder bumps on a semiconductor device are provided. In one embodiment, a substrate is provided having at least one contact pad formed thereon. A passivation layer is formed overlying the substrate, the passivation layer having at least one opening therein exposing a portion of the contact pad. A UBM (Under Bump Metallurgy) layer is formed overlying the passivation layer and th...

An apparatus for transporting glass substrates is provided to prevent damage to the glass substrates due to rotations of the glass substrates by applying a force to both edges of the glass substrates. An apparatus for transporting glass substrates includes a lower roller assembly(130), an upper bearing seat(140), an upper roller assembly(150), a fixing frame(160), and a fixing unit(200). The lower...

Method of producing an electronic structure comprising a thin layer of strained semiconductor material from a donor wafer , the donor wafer comprising a lattice parameter matching layer (2) comprising an upper layer of semiconductor material having a first lattice parameter and a film (3) of semiconductor material having a second, nominal, lattice parameter substantially different from the first l...

A method for manufacturing a non-volatile memory is provided. First, a substrate is provided, wherein a gate dielectric layer, a first conductive layer and a mask layer are formed thereon. Isolation structures are formed in the mask layer, the first conductive layer, the gate dielectric layer and the substrate. Next, a mask layer portion-removing step is performed, wherein the step includes: remov...

A semiconductor package with an enhancing layer is provided. The package includes a leadframe, a chip, several bumps and an enhancing layer. The leadframe includes several leads. Several bonding pads are disposed on a surface of the chip. The bumps connect the bonding pads of the chip and the leads of the leadframe. The enhancing layer covers the leads and the bumps. The enhancing layer including ...