Works managing system for rail transport comprises a first path section (2) for management using Balise control (L1) and an adjoining second path section (3) for management using radio control (L2). The path sections are divided into monitoring sections requiring movement authority (MA). At least one first Balise (11) arranged within the first monitoring section of the second path section (the las...

A light head (10) is mounted on a common base (12), and includes a light source (14) in a mounting base (16). The base (12) is mounted on a collapsible elongated pole (18), and the pole (18) is for mounting on an outside wall of a carrying case (22). There is a carrying handle (24) for the case (22), an electrical power outlet (30,32) mounted on a wall, base or lid of the case and for plugging in ...

Assembly for drilling and logging, comprising a device for electro pulse drilling (EPD device), at least one device to receive acoustic signals generated by the EPD device, distinguished in that the assembly further comprises at least one device to receive electromagnetic signals generated by the EPD device. Method for drilling and logging, and device for electro pulse drilling.

A semiconductor structure prevents energy that is used to blow a fuse from causing damage. The semiconductor structure includes a device, guard ring, and at least one protection layer. The device is constructed on the semiconductor substrate underneath the fuse. The seal ring, which surrounds the fuse, is constructed on at least one metal layer between the device and the fuse for confining the ene...

The present invention is related to a printed circuit board having embedded capacitors using a hybrid material and a method of manufacturing the same. This invention provides a printed circuit board having embedded capacitors using a material for a hybrid dielectric layer including liquid crystal polymer and ceramic powder, and a method of manufacturing such a printed circuit board.

A stacked semiconductor device includes a plurality of semiconductor chips and a conductive path extending through at least one of the semiconductor chips. The semiconductor chips are stacked together. The semiconductor chips are electrically connected by the conductive path, and the conductive path has a plurality of through-connections extending through the corresponding semiconductor chip.

Solid-state image sensors, specifically the image sensor pixels, which have three or four transistors, high sensitivity, low noise, and low dark current, are provided. The pixels have separate active regions for active components, row-shared photodiodes and may also contain a capacitor to adjust the sensitivity, signal-to-noise ratio and dynamic range. The low dark current is achieved by using pin...

The invention relates to a solid imaging device, comprising a pixel array, a read out circuit, A/D circuit or D/A circuit, column & row decoder circuit, a power array, a redundancy circuit array, a fuse array and a fault-allocating circuit. The pixel array has a plurality of columns of pixels, wherein each column of pixels is coupled to a column & row decoder, a read out circuit, A/D circuit or D/...

A vertical organic transistor is disclosed, which includes at least: a collector contact layer disposed on a substrate; a first organic semiconductor layer disposed on the collector contact layer; a base contact layer disposed on the first organic semiconductor layer, wherein the base contact layer comprises no less than two layers of hetero-metal layers or hetero-conductive organic layers; a seco...

A method of manufacturing a thin film transistor of an LCD is provided to reduce eight mask processes to six mask processes by using diffraction exposure. A semiconductor layer is formed on an entire surface of a substrate(120) including a first device constituting a pixel part, a second device constituting a driving circuit part, and a third device. Source and drain regions of three semiconductor...

A method of fabricating a liquid crystal display array substrate includes forming a gate wiring line having a gate pad electrode, forming a data wiring line having a data pad electrode, forming a protection layer over the gate pad electrode and the data pad electrode, and positioning etching tapes on the protection layer over the gate pad electrode and the data pad electrode.

A thin film transistor array comprising a substrate, thin film transistors, pixel electrodes, common lines, and auxiliary electrodes disposed on the substrate is provided. The substrate has a plurality of pixel regions, and each of the thin film transistors, pixel electrodes, and auxiliary electrodes are disposed in each pixel region. In each pixel region, the pixel electrode is covered over the c...

The present invention relates to a self-aligned double bit SONOS with vertical trapping layers and the method for making the same. The method comprises the following steps: (a) providing a substrate; (b) forming an opening on the substrate; (c) forming two discontinuous dielectric layers on the sidewalls of the opening; (d) forming a conductive layer; (e) forming a gate oxidation layer; (f) formin...

Provided is a self-scanning light-emitting element array chip structured on a substrate using Si. A lattice mismatching buffer layer ( 32 ) is formed on a Si substrate ( 30 ). On the lattice mismatching buffer layer ( 32 ), successively stacked are an n-type AlGaAs layer ( 14 ), a p-type AlGaAs layer ( 16 ), an n-type AlGaAs layer ( 18 ), and a p-type AlGaAs layer ( 20 ) in this order. On the AlGa...

The present invention is related to a light emitting diode of an omnidirectional reflector providing with a transparent conductive layer. In the present invention, a cohesion layer is formed between a transparent layer and a metal reflection layer to improve the cohesive force therebetween and increase the reflectivity of the light emitting diode, so as the present invention can enhance the light-...

An object of the present invention is to provide a Group III nitride semiconductor light-emitting device with high emission efficiency. The inventive Group III nitride semiconductor light-emitting device has an n-type layer, a light-emitting layer and a p-type layer composed of a Group III nitride semiconductor on a substrate, with the light-emitting layer sandwiched between the n-type layer and p...