Disclosed are a mesh cotton with a separating net on a surface thereof and a method of manufacturing the same. The mesh cotton ( 10 ) is manufactured by layering a plurality of cotton sheets ( 13 ) and adhering the layered cotton sheets to each other with an acryl binder, embossing a surface of the layered cotton sheets, and forming a transparent mesh-type separating net ( 11 ) using a dilution of...

The present invention provides a compound having a formula: where R¹ is selected from the group consisting of alkyl, -CH₂(OC₂H4)OCH₃, and -(OC₂H₄)OCH₃; n is 0-4; Olig is an oligomer having a formula: -L-O-PAG

The present invention relates to process for producing a transparent missile dome having a spanning angle larger than 180°, comprising the step of: (a) growing from single crystals of a ceramic material a first dome portion, said first dome portion being a portion of a sphere (b) growing from single crystals of a ceramic material a second dome portion, said second dome portion being a complementar...

In a reflecting-mirror supporting mechanism, elastic rotation about the lateral X axis is made possible by providing first spring elements 2 and second spring elements 3 in a bipod 1 . In addition, elastic rotation about the lateral Y axis is made possible by a spring member 6 , and elastically translational displacement along the axial Z axis is made possible by a parallel-spring member 9 . The t...

A system operable for ranging synchronization is provided. The system includes a first component that is operable to analyze a set of signals. The first component is operable to determine a subset of the set of signals based on a condition, at least some of the set of signals including ranging codes. The system also includes a second component that is operable to receive the subset of the set of s...

A demodulation timing generation circuit capable of generating correctly and with high precision a timing for demodulating a reception signal even under various kinds of reception conditions and a demodulation apparatus using the same, wherein AGC control and frequency offset correction are performed by the burst detector 109 and the amplification gain controller 111 using a synchronization traini...

A frequency error correction device for an OFDM receiver is proposed. The receiver receives an OFDM signal with a preamble section and a payload section including pilot carriers. The frequency error correction device includes a first frequency correction unit for correcting a relative phase error in a predetermined period of time based upon a frequency error in the preamble section of the OFDM sig...

Embodiments of the invention comprise systems and methods related to the provision of location based services via a mobile communications device. In different embodiments, a communication system is described, comprising a mobile communications device, a mobile communications base station, and a server computer system. The location of the device may be correlated with certain user preferences store...

A computer implemented method and apparatus for determining the source of at least one observed event occurring among a plurality of types of components is disclosed. The method, operable on a computer system, utilizes a data structure produced for determining the source of a problem by mapping a plurality of observed events and a plurality of known causing events, wherein the mapping represents a...

Device emulation implemented in programmable circuits. In one aspect, an interface for providing control of a hardware device includes functional code embedded in circuitry of the interface. Emulator code is embedded in programmable circuitry of the interface to emulate the hardware device during testing of the functional code and the interface. Another aspect diagnoses errors in a system having a...

A method, apparatus, system, and signal-bearing medium that, in an embodiment, estimate a number of rows that a recursive query will retrieve from a table by recursively probing an index associated with the table. A recursive query includes a seed and a recursive predicate, each of which is associated with a respective column in the table. If the index has a leading column that matches the table c...

A buffer includes an input unit that inputs data; an output unit that outputs the data; a plurality of registers that stores the data while sequentially shifting the data from the input unit to the output unit; an output-data selecting unit that selects desired data from among the data stored based on a predetermined priority, extract the desired data from a corresponding register, and outputs the...

A memory storage structure includes a memory storage device, and a first meta-structure having a first size and operating at a first speed. The first speed is faster than a second speed for storing meta-information based on information stored in a memory. A second meta-structure is hierarchically associated with the first meta-structure. The second meta-structure has a second size larger than the ...

An instruction cache controller uses supplemental memory to store a redundant copy of cached instruction data corresponding to a cache boundary position, and thereby enables subsequent single cache access retrieval of an instruction that crosses that boundary position. In one or more embodiments, the cache controller duplicates instruction data for the post-boundary position in the supplemental me...

A system and method for cache management in a data processing system having a memory hierarchy of upper memory and lower memory cache. A lower memory cache controller accesses a coherency state table to determine replacement policies of coherency states for cache lines present in the lower memory cache when receiving a cast-in request from one of the upper memory caches. The coherency state table ...

A method for use in a computer. A user of the computer stores a table of selections in a permanent memory structure of the computer, each selection indicating a memory object and one of at least two memory management policies for the memory object. The selections may select from one or more choices: e.g., whether pages of the memory object are to be reserved, or faulted on demand; whether pages of...

A data processing device has an instruction decoder ( 1 ), a control logic unit ( 3 ), and ALU ( 4 ). The instruction decoder ( 1 ) decodes instruction codes of an arithmetic instruction. The control logic unit ( 3 ) detects the effective data width of operation data to be processed according to the decode result from the instruction decoder ( 1 ) and determines the number of cycles for the instru...

A system and method of processing multiple swap requests including receiving a first swap request in a pipeline and executing the first swap request. A second swap request is also received in the pipeline immediately following the first swap request. The first swap request and the second swap request are examined to determine if the first swap request and the second swap request swap a same regist...

There is disclosed a data processor having a clustered architecture that comprises at least one branching cluster, at least one non-branching cluster and remote conditional branching control circuitry. Each of the clusters is capable of computing branch conditions, though only the branching cluster is operable to perform branch address computations. The remote conditional branching control circuit...

Determining an error-correcting code (ECC) for a cache entry based at least on the data stored in the cache entry and the memory address at which the data is permanently stored is disclosed. A cache entry for a desired memory address is retrieved. The cache entry includes data and a stored ECC based on the data and a memory address. An ECC is determined based at least on the data of the cache entr...